The present invention relates in general to semiconductor devices and, more particularly, to vertical gate transistors.
There is a continuing demand for semiconductor devices with a higher level of performance and a lower manufacturing cost. For example, manufacturers of switching regulators are demanding more efficient power MOSFET transistors for switching the inductor currents that develop the regulated output voltages. Higher efficiency is achieved by utilizing transistors with shorter channels to provide a higher frequency response to reduce the regulators"" switching losses.
However, most previous high frequency power transistors require advanced photolithographic equipment capable of resolving small feature sizes in order to provide the shorter length channels necessary to reduce switching losses. Other high frequency transistors are formed with vertical gate structures in which the channel lengths are defined by the thickness of a deposited gate electrode rather than a feature size of a photolithographic tool. This approach reduces the need for costly photolithographic equipment and reduces the cost of building the devices. However, existing vertical gate devices require numerous masking steps and a complex sequence of processing steps, which results in a low die yield and high manufacturing cost.
Hence, there is a need for a semiconductor device with a short channel for efficient high frequency operation that can be made with a simple sequence of processing steps and lower cost manufacturing tools.